Radyne DM240XR Spécifications télécharger pdf (Page 121)

DM240XR High-Speed Digital Modulator Remote Operations

MN-DM240XR– Revision 13 9–7

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Reserved

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Major Alarm

Bit 0 = Spare

Bit 1 = Transmit Oversample PLL Lock

Bit 2 = FPGA Config Error

Bit 3 = IF Synthesizer PLL Lock

Bit 4 = External Reference PLL Lock

Bit 5 = Composite PLL Lock

Bit 6 = Symbol PLL Lock

Bit 7 = Spare

0 = Pass, 1 = Fail

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Minor Alarm

Bit 0 = Terrestrial Ethernet data activity detect

Bit 1 = Loss Terrestrial Clock

Bit 2 = Loss Terrestrial Data

Bit 3 = FIFO Error

Bit 4 = Output Level

Bit 5 = Terrestrial Framing Error

Bit 6 = Terr Ethernet jitter buffer underflow

Bit 7 = Terr Ethernet jitter buffer overflow

0 = Pass, 1 = Fail

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Common Fault

Bit 0 = -12 V Alarm

Bit 1 = +12 V Alarm

Bit 2 = +5 V Alarm

Bit 3 = Spare

Bit 4 = Spare

Bit 5 = Spare

Bit 6 = Spare

Bit 7 = Spare

0 = Pass, 1 = Fail

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Latched Major

Alarm

Bit 0 = Spare

Bit 1 = Transmit Oversample PLL Lock

Bit 2 = FPGA Config Error

Bit 3 = IF Synthesizer PLL Lock

Bit 4 = External Reference PLL Lock

Bit 5 = Composite PLL Lock

Bit 6 = Symbol PLL Lock

Bit 7 = Spare

0 = Pass, 1 = Fail

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Latched Minor

Alarm

Bit 0 = Terrestrial Ethernet data activity detect

Bit 1 = Loss Terrestrial Clock

Bit 2 = Loss Terrestrial Data

Bit 3 = FIFO Error

Bit 4 = Output Level

Bit 5 = Terrestrial Framing Error

Bit 6 = Terr Ethernet jitter buffer underflow

Bit 7 = Terr Ethernet jitter buffer overflow

0 = Pass, 1 = Fail

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Latched Common

Fault

Bit 0 = -12 V Alarm

Bit 1 = +12 V Alarm

Bit 2 = +5 V Alarm

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Radyne DM240XR Spécifications Page 121

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